Help with Creating delay to signals

[Altera_Forum]

I have written a simple program just to get a Clow how to do a slight delay to a signal.  

 Entity delay is Port(sw: in std_logoc;  X: out std_logic_vectot(0 to 15);  Y: out std_logoc  ); End entity;  Architecture behave of delay is  Signal x1 : std_logic_vector(0 to 15); Signal y1 : std_logic; Begin  Process(sw)  Begin   If sw='1' then  y1<='1'; x1(0 to 3)<="1111"; - - I want to delay this for a few ns Else y1<='0'; x1(0 to 3)<="0000"; End if ;  End process; X<=x1; Y<=y1; End;  I have tried to write things like: "After 2ns" Or "transport "1111" after 2ns"  But in the wave for I didn't see any chance   Please halp If you can I want to now how to see this in wave for in quartus

[Altera_Forum]

after N ns is only meant for simulation, it is not synthesisable. 

For delays, you will have to use the system clock and some delay machanism (like a counter and enable) to get this to work. But why do you only want a few ns delay? unless you have a very fast clock, that wont be acheiveable. And smacks of poor timing relationships in your design.