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How do I use N25Q512 Quad-SPI Flash, instead of ECPQ512?

Altera_Forum
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I have a board designed to boot the Cyclone V FPGA from AS Flash, using a N25Q512A13G1240E chip instead of Altera's EPCQ512. (NB: This is a product, not a dev-kit) 

 

However, in Quartus Prime, the Programmer's "Convert Programming File" dialog only has the option of choosing EPCQ512 when generating the JIC file. 

 

When this JIC file is used to JTAG program the FLASH via the FPGA, it fails with the following message: 

"Error (209025): Can't recognize silicon ID for device 2. A device's silicon ID is different from its JTAG ID. Verify that all cables are securely connected, select a different device, or check the power on the target system. Make sure the device pins are connected and configured correctly." 

 

Presumably this is because Quartus reads back the ID of the N25Q512, and it doesn't match that of a EPCQ512. 

 

Any ideas of how to get around this? I think the Altera SoC Development board uses similar FLASH to mine, so presumably there must be some sort of work-around for this. 

 

NB: I am trying to configure the FPGA with this flash chip, not boot the ARM processor from it. (One step at a time!) 

 

 

 

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Altera_Forum
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I also had problem with N25Q512, but N25Q256 was OK.  

It was not the ID problem. N25Q512's controlling method is different from N25Q256.
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Altera_Forum
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I have tested the N25Q512A11G1240E (instead EPCQL-512) with an ARRIA10 configured in AS mode and it works well with the Quartus 15.1 after the .jic file generation.

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Altera_Forum
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--- Quote Start ---  

I have tested the N25Q512A11G1240E (instead EPCQL-512) with an ARRIA10 configured in AS mode and it works well with the Quartus 15.1 after the .jic file generation. 

--- Quote End ---  

 

 

That's fascinating. Apart from the voltage level difference, there shouldn't be any algorithmic or (conceptual) wiring differences between your design and mine. 

 

Would you mind describing the programming sequence, any non-default device settings you may be using in Quartus, and perhaps a screen grab of the relevant bit of the schematic? 

 

Then maybe we can get to the bottom of this issue and save everyone having to buy over priced EPCQ chips in future. 

 

Thank you
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

That's fascinating. Apart from the voltage level difference, there shouldn't be any algorithmic or (conceptual) wiring differences between your design and mine. 

 

Would you mind describing the programming sequence, any non-default device settings you may be using in Quartus, and perhaps a screen grab of the relevant bit of the schematic? 

 

Then maybe we can get to the bottom of this issue and save everyone having to buy over priced EPCQ chips in future. 

 

Thank you 

--- Quote End ---  

 

 

For the ARRIA10 : 

1 - I configure the FPGA with a design includng with an embedded "Serial Flash Controller" 

2 - Once this is done, you should be able to detect the JTAG chain and then appear the ARRIA10 + EPCQL-512 in the Programmer 

3 - Program the FLASH with the .jic file (Disable EPCS ID checked, Disable CONF_DONE checked) through the programmer : Quartus read the ID=0x20 (capacity of the FLASH=512M) 

 

I will try to attach a screenshot but I don' know how to do that for the moment....
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Altera_Forum
Honored Contributor II
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Did you solve this problem now? I want to use the N25Q512 instead of ECPQ512 also,Do you have any advice? Thank you!

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Altera_Forum
Honored Contributor II
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No, I haven't got it working. My advice would be to try the N25Q256 as that is used on several dev kits and should work OK.

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Altera_Forum
Honored Contributor II
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We use N25Q512A as configuration flash for Cyclone V in one of our projects and got the same problem. Finally, I've got it working. N25Q512A have almost the same command set, as epcq devices, but there is one exception. One should execute READ FLAG STATUS REGISTER command before every PAGE PROGRAM or ERASE commands. Thats why Altera Programmer can't write anything to this chip. But you can write firmware to flash manually using NIOS with epcs flash controller ip core. You should use *.rpd programming file with big endian endianless (button "Options/Boot info..." in Convert Programming File dialog). Here is NIOS C example code in attachement.

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Altera_Forum
Honored Contributor II
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Yes, we fell for that marketing spin, and designed-in two Micron (BGA) flash chips (for FPGA and HSP boot), only to be told that Altera won't support programming them, won't help us debug the problem, won't confirm or deny whether there is a technical reason why the N25Q512 will or won't work with the Cyclone V. Then they just told us to go away and re-layout the board for EPCQ512 (SOIC) chips. 

Even if the EPCQ512 were available from any distributor the UK, they would still add £200 to the BOM and thereby make the product unsaleable. 

 

I no longer trust Altera. 

My direct experience is that unless your product is going to sell >100K units, you get no support and you are on your own. 

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Yes, that's a big joke, everyone konws that altera use 3rd party flash mark as Altera's, and the flash is sold even more expensive than the FPGA itself.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

For the ARRIA10 : 

1 - I configure the FPGA with a design includng with an embedded "Serial Flash Controller" 

2 - Once this is done, you should be able to detect the JTAG chain and then appear the ARRIA10 + EPCQL-512 in the Programmer 

3 - Program the FLASH with the .jic file (Disable EPCS ID checked, Disable CONF_DONE checked) through the programmer : Quartus read the ID=0x20 (capacity of the FLASH=512M) 

 

I will try to attach a screenshot but I don' know how to do that for the moment.... 

--- Quote End ---  

 

 

I also think this way would be OK, I have tested it on Cyclone IV with N25q128
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