How to check signal waveform.

[Altera_Forum]

I have this VHDL code within my architecture: 

 architecture first of butterfly8 is  signal butterfly8_r_Z1, butterfly8_r_Z2, butterfly8_r_Z3, butterfly8_r_Z4: std_logic_vector(31 downto 0);     I know that I can use Vector Waveform File to monitor my waveform of INPUT and OUTPUT pins. Would it be possible to monitor my signal, such as butterfly8_r_Z1 in the architecture? If so, how to do it? Thanks

[Altera_Forum]

There is usually more to a message than that. Can you expand it to get more info? What are the lines right around it? (For example, if it can't place the I/O it gives a message if it's a pure count, i.e. 700 pins needed, 650 available, or if it can't fit them all into I/O because of I/O standards, it lists some of the permutations it has tried).

[Altera_Forum]

I have set all of my input and output pins to VIRTUAL PINS. When I compile it, the following msg pop up : 

 Pls find the attachment  http://i27.tinypic.com/16m0ehw.jpg

[Altera_Forum]

remove any pin assignments you may have made in Pin Planner?

[Altera_Forum]

I have removed the pin assignments in PIN PLANNER. However, still having the same problem after compiled. Please find below picture: 

 http://i28.tinypic.com/yialu.jpg

[Altera_Forum]

The design uses 513 pins, so I'm guessing it didn't take. (I'm betting you assigned a bus with the virtual pins, but it needs to be assigned to each bit.) Look in the fitter report under input, output and bidir pins to see the usage.

[Altera_Forum]

Yes, I assigned a bus with the virtual pins!!!! Please find below Picture: 

http://i31.tinypic.com/21bu4om.jpg

[Altera_Forum]

--- Quote Start ---  (I'm betting you assigned a bus with the virtual pins, but it needs to be assigned to each bit.)  --- Quote End ---   i'm not sure about this, i am using virtual pins on a bus.

[Altera_Forum]

cwj: can you post a pic of your Assignment Editor window (with the Virtual pins)?

[Altera_Forum]

Here you go: 

 http://i25.tinypic.com/orth5x.jpg

[Altera_Forum]

i don't think you need to fit the design (where you are running into pin problems) to do a functional simulation. 

 just run Analysis and Synthesis (or even just Analysis and Elaboration), then Generate Functional Simulation Netlist, then Start Simulation.

[Altera_Forum]

You mean I don't have to compile in full version. Just do Analysis and Sythesis...then Generate Functional Simulatio nNetlist and simulation?

[Altera_Forum]

for a functional simulation that is correct, you only need to run Analysis and Synthesis (actually only Analysis and Elaboration) rather than a full compilation.

[Altera_Forum]

i don't know why your Virtual Pins aren't taking though, that is strange.

[Altera_Forum]

I wrote a simple code as below and I assigned all my input and output pins to VIRTUAL PINS. However, I still have the same problems. Can't fit my pins when I performed a full compilation.  

 http://i25.tinypic.com/245ajpd.jpg http://i32.tinypic.com/2j0xhqw.jpg http://i32.tinypic.com/214scjd.jpg  http://i30.tinypic.com/2ivi5jl.jpg

[Altera_Forum]

I found an related topic over here: 

 http://www.alteraforum.com/forum/showthread.php?t=3912

[Altera_Forum]

ah, i see. there should probably be a solution to clarify that Virtual Pins are a feature of Incremental Compilation, which is not a part of Web Edition.

[Altera_Forum]

Virtual pins aren't part of incremental compilation, just not part of the webversion. I use virtual pins on designs without incremental compilation quite often. (But yes, if there's no message about the assignment being explicitly ignored, there should be.)

[Altera_Forum]

well unfortunately Virtual Pins don't appear on this comparison chart. is there a place that explicitly says they aren't included in Web Edition? 

 http://www.altera.com/literature/po/ss_quartussevswe.pdf

[Altera_Forum]

i'm sure it must be related to LogicLock or Incremental Compile.

[Altera_Forum]

That means not available in Web Edition? 

 If I perform 'start analysis and synthesis' then generate functional netlist. and perform simulation, it works fine!

[Altera_Forum]

well from your tests it appears that you cannot use Virtual Pins in Web Edition. i don't have that version installed so i can't confirm. 

 that's right, you'll save some time without running the full compilation/Fitter too. ;)