How to constraint the min delay?

[NuvKFC]

I use LCELLs to generate a pulse.

The verification engineer may use difference FPGA device to verify the design.. 

But the delay of LCELL in advance node FPGA is very small so that the pulse which is generated by  LCELLs is very short.

And the design can't be changed.

So, I want to constraint the min delay between LCELLs.

I had tried following constraints. But it can't work.

Constraint:

set_min_delay 1.0 -from [get_pins lcell1|combout] \

                                  -to      [get_pins lcell2|data*]

set_net_delay -min 1.0  -from [get_pins lcell1|combout] \

                                            -to      [get_pins lcell2|data*]

How to constraint the min delay?

Thank you very much.

[NuvKFC]

Can anyone help me? Please. Thank you very much.

[RichardTanSY_Intel · Accepted solution]

I haven't try to constrain a delay between combinational logic. Have you try to use the set_data_delay before?

I don't think the set_net_delay works with comb. logic but you can check the Ignored SDC Report and see whether the constraints have been applied in your design.

https://www.intel.com/content/www/us/en/docs/programmable/683432/21-4/tcl_pkg_sdc_ext_ver_2.0_cmd_set_data_delay.html

[RichardTanSY_Intel]

There is a duplicate case with the same issue. Please refer to the case below (link attached) for further support.

https://community.intel.com/t5/Intel-Quartus-Prime-Software/How-to-constraint-min-delay-between-LCELLs/m-p/1383451#M73642

With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,

Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos and select the best solution. 

[NuvKFC]

Hi RichardTanSY_Intel

    Thank you, RichardTanSY_Intel, very much.

Unfortunately, Quartus13.1 seem that don't support set_data_delay command.

I will continuous follow the other one case.

Thank you very much.