How to find connections to a net?

[Altera_Forum]

Using Quartus 8.1, I usually poke at the longest path in TimeQuest to see what's going on. I would like to see who's connected to some of the high fanout nets. I can see how to interrogate a driving pin's loads in Resource Property Editor by right clicking on the driving pin and choosing "Destination Node" to display a list, but I would like to be able to do this in a Tcl window in TimeQuest. I reviewed all commands available (get_pins, get_nets, get_pin_info, get_fanouts, etc., from the various Tcl packages, but none of them seem to be able to report the pins of a net. Is there a Tcl command, or command sequence, that can provide this information? Thanks.

[Altera_Forum]

I don't know of a Tcl command, although I'm sure it's possible to make your own, since there are commands for getting full path information. I'm sure you just want your own, though. 

 I generally locate a node to the Chip Planner. I make sure the equation viewer is on. With the node highlighted I see all of it's fan-in and fan-out, and can select nodes in those boxes and click on the Go To button to select them. I also use the Show Fan-Out or Show Fan-In boxes to visually see them all.   For example, I may start at a source register and click Show Fanout. Then in the equation viewer I will highlight all the combinatorial nodes(they have a c by them) and click on Go To. I then click on Show Fanout again, and proceed.   Note that the end result is almost identical to just doing a "report_timing -from source_node", then highlighting all the paths in the Summary and right-click Locate to Chip Planner. The problem is that this is often a rats-nest, where my method lets me see them grow step-by-step. I usually don't even trace the whole path, I just get an idea of how that register's fanouts grow, which is what I'm looking for.  Also note that a Tcl dump will often make it look like there are more nodes than you think. A path into a memory or DSP may look like a single physical node, but a Tcl dump would show that it feeds many different registers within that block. Technically, I prefer to still think of it as one location though.  Another thing I run to analyze how thick logic is, is to run timing analysis from a source(or to a destination), once with -pairs_only and once without, to get a better idea of how many rats nest are between endpoints. If you try it you'll see what I mean. I have a design I'm looking at right now that only shows 20 paths coming from a source when I do -pairs_only, and over 20,000 paths when I don't.