How to get OpenCL kernel simulation performance by Altera OpenCL SDK or Quartus II?

[Altera_Forum]

I am using OpenCL to program FPGA by Altera OpenCL SDK. However, I don't have an Altera FPGA board now. Thus currently I just want to do emulation or simulation to get performance like number of cycles giving frequency. 

  The emulator SDK provides could help to do functional debugging by -march=emulator option to aoc, but for now I couldn't see any performance result except for some resource usage reports. Does anyone know how to get what I want through this process?   What's more, the aoc -c step also generates a Quartus II project which is very complex, as there are lots of submodules and ips. Is there any possibility to use this project to do cycle accurate timing simulation? If so, how to write testbench for it?

[Altera_Forum]

Hi, 

 I can't tell much about cycle accurate timing simulation, but one sure thing is if the workflow in your kernel is data dependent, then it is very hard to get a good performance measurement in advance.  If your kernel is of type NDRange and you activate the resource-driven optimizer, you will get some estimate such as how many work-items are processed per unit of time.  All in all, the best performance measurement I have found is by activating the profiling in your OpenCL code and timing the kernel execution. This, along with the Altera profiler.  I hope this helps.

[Altera_Forum]

Thanks, Smith. Does profiling mean that I should run the kernel on an actual FPGA board?

[Altera_Forum]

Yes. Fore more information, read the section on page 1-17 of the best practices guide (http://www.altera.com/literature/hb/opencl-sdk/aocl_optimization_guide.pdf).

[Altera_Forum]

I see. Thanks very much, Smith.

[Altera_Forum]

Hi troore, 

how did you use OpenCL SDK without the board? Did you buy the AOCL license?   I have no board yet, so I have your same need but when I try to compile my kernel, it says I need an AOCL license.  Thanks

[Altera_Forum]

Hi Miguel, 

 You do need a AOCL license to compile your OpenCL kernel code (and for synthesis as well). The board is only necessary when you want to perform actual performance evaluation using a real FPGA. The emulator is useful for functional debug of your kernel; the OpenCL kernel code is compiled into a shared-library that is called at runtime, which enables debugging using any traditional debugger such as GDB.  Hope this helps.  David

[Altera_Forum]

without board, it is a bit hard to see the actual performance.. just go and purchase one.