Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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17267 Discussions

How to include a HPS with block symbol file

Altera_Forum
Honored Contributor II
2,689 Views

Hello, 

 

I'm quite new in the HPS development process and the toolchain from ALTERA. 

Could someone give me some instruction how I can implement the generated HPS System with QSys in a Block diagram file? 

After it should look like that the HPS is the central symbol block and the other logic is conneted to it's interfaces. 

The logic itself from the different blocks should be implemented in VHDL Code. 

 

Actually when I create a blank block diagram file and insert the generated block symbol file from the HPS which is generated by QSys I get always errors: 

 

Error: The auto-constraining script was not able to detect any instance for core < hps_sdram_p0 > 

Error: Verify the following: 

Error: The core < hps_sdram_p0 > is instantiated within another component (wrapper) 

Error: The core is not the top-level of the project 

Error: The memory interface pins are exported to the top-level of the project 

Error: Alternatively, if you are no longer instantiating core < hps_sdram_p0 >, 

Error: clean up any stale SDC_FILE references from the QSF/QIP files. 

 

How can I fix this issue and where can I find a guideline how to use block symbol files? 

 

Thanks
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Altera_Forum
Honored Contributor II
1,672 Views

You should add only the .qip file to your Quartus Project. And the top level entity souldn't be named like your Qsys System, your top level entity is your schematic file.

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