"Domain crossing is something you need to handle in your design" - This is exactly I want to check ...For example, I want to check a precense of synchronizers between clock domains... I know Xilinx support CDC checks. Do the checks supported byy Altera as well?
In the Design Assistant, there is an option 'Run Design Assistant during compilation'. Should I enable it? If it's not enabled, will the listed checked be not performed at all?
what's flow it's better - letting the Design Assistant run automatically during compilation or run it when all the flow was finished?Does it have a big impact on the compilation time? In the project, which I'm working on, all the options are checked/selected on (including the automatically run)... Is it possible to know how time was spent on that (besides 'try&see')? Does Quartus report how long time it spend on each stage?