Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to manually instantiate the generated memory model for Qsys testbench?

Altera_Forum
Honored Contributor II
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Dear all, it says here 

http://www.altera.com/support/kdb/solutions/spr375501.html 

 

When you attempt to generate a DDR with ALTMEMPHY design with Qsys and set the create testbench qsys system option to any value other than none, the system fails to connect a memory model to the Qsys-generated testbench.  

 

we need to manually instantiate the generated memory model (<instance_name>_mem_model.v/.vhd) in the Qsys-generated testbench (<instance_name>_tb.v/.vhd) . 

 

But how to manually instantiate the generated memory model? what name should be used for the instantiation? anyone have examples? 

 

Thank you very much!
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