Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to recreate a timing failure on two different machines.

JHaye4
New Contributor I
1,570 Views

We have a continuous integration job run each night to build our FPGA images, this runs on a server that we don't have access to for day to day working, it is dedicated to running CI jobs.

 

Recently the job to build the FPGA images has developed an intermittent timing failure, some days it fails, some days it passes. I have since added a constraint to the QSF (
set_global_assignment -name SEED <value>) to try to make this deterministic and recreatable.

 

However, when I run the compilation locally on my development machine, the build reliably meets timing.

 

Is there a way that I've missed to ensure consistency of builds from different machines?

 

Context:
Running Quartus Pro 21.2

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1 Solution
Nurina
Employee
1,470 Views

Hi,


As long as you did not make any changes to your design and are using the same environment (machine), then you will be able to reproduce the same timing results regardless how much time has passed.


Regards,

Nurina


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5 Replies
JHaye4
New Contributor I
1,556 Views

I have just triggered the job to run again and the compilation process in question has passed timing with no changes made to any of the contributing RTL.

 

Why do two different compilation runs with the same seed result in different results in timing? I thought setting the seed should make the process deterministic?

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sstrell
Honored Contributor III
1,539 Views

Using the same seed number doesn't mean anything.  If you compile the same project on two different machines, the seed is already different between them.  It doesn't matter what seed number you select.

JHaye4
New Contributor I
1,528 Views

Thank you very much for your reply sstrell.

 

Is there any way to make the compilation process somewhat deterministic? We have a requirement to be able to reproduce artifacts from a given repository state.

 

Do factors such as time of day/date affect the seed? Does the contents of a .mif/.hex file for initalising RAM contents have an effect?

So, for example, if I ran a compilation today, and then if I ran another compilation from the same repository state on the same machine two week later, would you expect the results to be the same?

 

When I was reading https://www.intel.com/content/www/us/en/docs/programmable/683145/21-3/change-fitter-placement-seeds.html it made no mention of different machines, etc. so I hoped there may be a way to do this.

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Nurina
Employee
1,471 Views

Hi,


As long as you did not make any changes to your design and are using the same environment (machine), then you will be able to reproduce the same timing results regardless how much time has passed.


Regards,

Nurina


JHaye4
New Contributor I
1,450 Views

Thank you for your answer Nurina.

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