Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to report Tco, Tsu, Th of a derived clock or PLL clock?

Altera_Forum
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Hello, 

I am using a EP2C8 device and using classic timing analysiser to check the timing relationship of my design. I used a PLL and used the PLL output as a global clock. How can I obtain the Tco, Tsu and Th related to the PLL output clock? Quartus only report these parameter related to the PLL input clock. 

PLL input: 65.536M 

PLL output 1: 51.2M, use as FPGA global clock 

PLL output 2: 51.2M, output from PLL output pin to drive external device(SDRAM) 

 

I want to adjust the phase relationship between PLL output 1 and PLL output 2. I can not use 51.2M clock chip directly because I had to use 65.536M clock to drive another device. 

 

best, regard
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