I want to do gate level simulation for a module1 in ModelSim, for example, the module I want to simulate, the instance is called A. I full compiled this module in QuartusII.
Then I wrote a testbench, in this testbench, besides the module1 I want to simulate, I also need another module2. In my testbench, I create the instance of this module，name it as B.
So in my testbench, now I have two modules instances, A and B. I have the vo and sdo files for A, but no B. For RTL simulation, there will be no problem. But if I want to do gate level simulation, I don't have vo and sdo files for B, so how can I simulate with the testbench which need to use module2 (instance B)?
Thanks very much.
