How to upgrade FPGA programming file for products in the field when using CvP as config scheme

[Steve-Mowbray-ENL]

Hi need some guidance on planning for FPGA program upgrade in the field when CvP over PCIe is the only configuration scheme on the target platform -- we have a basic working system on the bench with CPU and Arria 10 communicating via PCIe:

- initial CvP peripheral currently programmed into FPGA active serial flash via JTAG and we can CvP program the respective core image via CPU for fully functional operation

- if we make some improvements to the FPGA project but keep the PCIe section identical the updated core image will program seemingly ok but does not operate when using the original peripheral image so we guess that the core and peripheral images are dependant items

So my question is how do we plan for updating the FPGA program for products in the field where we will not have JTAG access? Is there a way of updating the FPGA flash via PCIe?

Thanks

Steve

[FvM]

Hi,
Arria 10 CvP implementation has some restrictions, e.g. regarding the feature to reconfigure the FPGA via CvP. We got the impression that reliable operation is hard to achieve or even impossible and are happy to have CFI flash with PFL CPLD available in the design.

[Steve-Mowbray-ENL · Accepted solution]

So its looking like we should be using Remote System Update based on Remote Update IP block -- CvP being a configuration scheme rather than an update manager scheme

[ventt]

Hi @Steve-Mowbray-ENL,

I’m glad that your question has been addressed, I now transition this thread to community support. 

If you have a new question, feel free to open a new thread to get the support from Intel experts.

Otherwise, the community users will continue to help you on this thread. 

Thanks.

Best Regards,

VenTing_Intel