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Hello,
I try to simulate a Cyclone IV Tranceiver design with Modelsim PE 10.2c. As far as I can see, I have compiled all necessary libraries with the TCL script that is generated with the Quartus II (14) Command Tools -> Run Simulation Tool -> RTL Simulation. The simulation principally seems to work, because the MPLL locks to the reference frequency and 8b10b word align symbol is send by the transmitter. Anyway it is not working as I did expect, because the receiver doesn’t lock to the reference when I use the proposed reset sequence but when I release all resets and set gxb_powerdown for 1us. Maybe the simulation behavior is not correct because I get hundreds of warnings "*** Warning: (vsim-8684) No drivers exist on out port /…/…, and its initial value is not used. Therefore, simulation behavior may occur the is not in compliance with the VHDL standard as the initial values come from the base signal /…/…" Has somebody an idea how to deal with these warnings? Best Regards!Link Copied
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Which Version of VHDL do you use for the Design?
(if not 93 - set the compiler inside ModelSim to the used Version)- Mark as New
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Hey Taz1984, thanks for your reply! The wohle Project is already compiled in 93 standard.
Best Regards
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