Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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I run the example as the HLS Compiler Getting Started Guide, but occur a warning LNK4088. Do you meet this warning?

志周1
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MuhammadAr_U_Intel
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This error message may appear if you are building an HLS design for FPGA on Windows:

warning LNK4088: image being generated due to /FORCE option

 

This is a known issue, but it does not affect your design. Your *.exe should still run correctly.

 

Hope this helps.

 

Thanks,

Arslan

 

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