IORD and IOWR, the question is easy:)

[Altera_Forum]

Hi, 

can someone explain to me the command syntax and IORD IOWR? Could you tell me where to study these things?  Thanks to all

[Altera_Forum]

Include the io.h file which contains those macros like this: 

 # include "io.h"  Here is the syntax for IORD and IOWR:  IORD(base, offset) IOWR(base, offset, data)  base is the base address of the peripheral you are accessing. Offset is the word offset of the register you are accessing in the peripheral. The word size is assumed to be 32-bit so offsets 0, 1, 2, 3, etc... map to byte offsets 0, 4, 8, 12, etc....  That said I recommend using the data size oriented version of these macros called:  IORD_8DIRECT(base, offset) IORD_16DIRECT(base, offset) IORD_32DIRECT(base, offset) IOWR_8DIRECT(base, offset, data) IOWR_16DIRECT(base, offset, data) IOWR_32DIRECT(base, offset, data)  The only difference is that 'offset' is in bytes and that the macro you choose dictates the width of the access. These give you more control over the access size since they access 1, 2, or 4 bytes at a time. This is important when you access a slave port that contains byte enables and has multiple values stored in a single wide register.  These macros perform data cache bypassing. They are typically used for peripheral accesses so that the data doesn't become cached.

[Altera_Forum]

--- Quote Start ---  I  Offset is the word offset of the register you are accessing in the peripheral. The word size is assumed to be 32-bit so offsets 0, 1, 2, 3, etc... map to byte offsets 0, 4, 8, 12, etc....  T  The only difference is that 'offset' is in bytes and that the macro you choose dictates the width of the access. These give you more control over the access size since they access 1, 2, or 4 bytes at a time. This is important when you access a slave port that contains byte enables and has multiple values stored in a single wide register.  These macros perform data cache bypassing. They are typically used for peripheral accesses so that the data doesn't become cached.  --- Quote End ---    Hi, can better explain the speech of the offset?  thank you very much

[Altera_Forum]

The IORD and IOWR macros treat the offset as a four byte word offset. Here are some examples: 

 IOWR(0, 4, 1234). -> writes 1234 to base 0 + word offset 4 (byte address 0 + 4x4= 16) IORD(12, 2) -> reads from base 12 + word offset 2 (byte address 12+2x4 = 20)  In general the byte offset is 'base + offset x 4'. The access size is always 4 bytes which is why I don't recommend using IORD and IOWR and use the 8/16/32DIRECT ones instead which always use byte offsets.

[Altera_Forum]

--- Quote Start ---  The IORD and IOWR macros treat the offset as a four byte word offset. Here are some examples:  IOWR(0, 4, 1234). -> writes 1234 to base 0 + word offset 4 (byte address 0 + 4x4= 16) IORD(12, 2) -> reads from base 12 + word offset 2 (byte address 12+2x4 = 20)  In general the byte offset is 'base + offset x 4'. The access size is always 4 bytes which is why I don't recommend using IORD and IOWR and use the 8/16/32DIRECT ones instead which always use byte offsets.  --- Quote End ---    I understand, thank you so much. If the word to read is a pio, for example with 8 bit, it makes sense to calculate an offset?  Where can I study these things?   thank you so much.

[Altera_Forum]

For the PIO you don't actually need to use IORD and IOWR. There are helper macros that come with the PIO that you can use which use IORD and IOWR behind the scenes for you. If you want to see some example usage of the PIO the 'board_diag' software example uses the PIO macros to read values driven by push buttons and outputs to LEDs on the board. 

 To inspect the PIO macro file you can find it here (going by memory):  /<Quartus install directory>/ip/sopc_builder/altera_avalon_pio/inc/<include file.h>  The PIO macro file will take care of the offsets for you. You can also find the macros in the PIO user guide.