IP catalog generating .qsys files in platform designer

[Yogesh]

I installed arria 10 support to intel quartus 18.1 standard edition . After this I am seeing some changes in the tool . Need some clarification regarding the same :

Before the IP catalog parameter edition used to give me 2 files .qip and .v design files were enough for me to instantiate and simulate . Below is the screenshot of the same.

But now if I click on the IPs .qsys files are being generated in platform designer as below.

But I dont want to involve platform designer for IPs like BRAM or DSP. So is something wrong with settings ? I dont want to generate .qsys file , instead I want to generate .qip and .v file for any IP I generate .

Please guide and reply as soon as possible.

[sstrell]

The newer IP Parameter Editor for certain IP in Standard edition creates components in this way.  The files are behind the scenes anyway, so you don't need to interact with them directly.  What is your concern about this change?

[SyafieqS]

Hi Yogesh,

Yes true, few certain IPs in Quartus generate in PD and also Megawizard. The things is both way are generating the qip and hdl files for you. 

Thanks,

Regards