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15309 Discussions

IP catalogue different in Platform Designer

Yannick
Novice
355 Views

Hello everyone,

 

I'm just getting started with FPGA programming and using a Cyclone V GT development kit with Quartus Prime Lite 18.1.

To begin with, I followed a lot of the provided training and tutorials. The material is great and I felt ready to start my own design.

 

However, there was immediately an issue with the IP catalogue when starting up. While Quartus Prime Lite contained all the IP cores I wanted to use, some are missing in Platform designer of the same installation. Please see the attached screen capture of a simple example.

The native PHY of the cyclone V is in the Quartus Prime Lite but not in the Platform Designer IP catalogue.

 

I tried adding the path manually in Platform Designer. The log states it found files in the subdirectory. But nothing appears in the catalogue.

The behavior with an installation of version 20.1.1 is the same.

 

Does anyone know if that is intended or how to work around this?

 

Best regards,

Yannick

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1 Solution
RichardTanSY_Intel
340 Views

Some Intel IP cores may or may not support the Qsys and SOPC Builder design flows and the Native Transceiver Native Phy Intel Cyclone V IP seems to be one of it that does not support the Qsys flow. 

You may checkout a similar forum case. There's some broken link which I can't do much about it. 

https://community.intel.com/t5/FPGA-Intellectual-Property/Cyclone-V-Transceiver-Native-PHY-IP-not-av...

Since you beginning to begin your design with this IP, you may also checkout the Cyclone V Transceiver PHY Basic Design. There are a few design examples that you can refer to:

https://community.intel.com/t5/FPGA-Wiki/Cyclone-V-Transceiver-PHY-Basic-Design-Examples/ta-p/735390

 

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3 Replies
RichardTanSY_Intel
341 Views

Some Intel IP cores may or may not support the Qsys and SOPC Builder design flows and the Native Transceiver Native Phy Intel Cyclone V IP seems to be one of it that does not support the Qsys flow. 

You may checkout a similar forum case. There's some broken link which I can't do much about it. 

https://community.intel.com/t5/FPGA-Intellectual-Property/Cyclone-V-Transceiver-Native-PHY-IP-not-av...

Since you beginning to begin your design with this IP, you may also checkout the Cyclone V Transceiver PHY Basic Design. There are a few design examples that you can refer to:

https://community.intel.com/t5/FPGA-Wiki/Cyclone-V-Transceiver-PHY-Basic-Design-Examples/ta-p/735390

 

Yannick
Novice
317 Views

Thank you for the quick reaction and insight. I was searching more generally and didn't see the other entry.

That should get me started.

RichardTanSY_Intel
296 Views

I’m glad that your question has been addressed, I will now transition this thread to community support.

If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

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