Is DDR5 phy-only IP available?

[nama828]

Hi!

I'm using Agilex 7 M-series (AGMF039) and Quartus Prime Pro 24.2.
I'm looking for DDR5 PHY-only IP, but I couldn't find it in the EMIF IP.
However, I confirmed that PHY-only mode is provided for DDR4 in Agilex 7 I/F-series.

So, I have two questions:

1. Is there a plan to release DDR5 PHY-only IP? If so, could you provide a rough release date?

2. If I modify the EMIF_DDR5 IP to use it in PHY-Only mode (e.g., emif_ph2_620), can it be synthesized and ported to the FPGA?

Thank you.

[AdzimZM_Intel · Accepted solution]

Hi nama828,

"1. Is there a plan to release DDR5 PHY-only IP? If so, could you provide a rough release date?"

• Yes, there is plan to support PHY-only mode in EMIF IP for Agilex 7 M series device but the release date is not yet confirmed.

"2. If I modify the EMIF_DDR5 IP to use it in PHY-Only mode (e.g., emif_ph2_620), can it be synthesized and ported to the FPGA?"

• No, because the EMIF IP is using harden circuitry.

Regards,

Adzim