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Is it necessary to exit a kernel in order to transfer data to host?

Altera_Forum
Honored Contributor II
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Hello everyone! 

 

I recently got my hands on an OpenCL board and so far it's been really nice to work with it.  

 

Question: I want to send regular updates up to the host and down to the kernel, while my kernel is still running (it runs in an infinite loop). For sending data up to the host, I've found that the only way is to have two "communication kernels" which take data from my "infinite loop kernel" by using channels, and write to a global memory buffer. When the buffer is full, the "communication kernel" exits, which the host can see this event and proceeds to read from the global buffer. In this time, the second "communication kernel" starts filling its own buffer.  

 

Writing to the kernel involves the host filling up a buffer, and starting a "host-to-FPGA-kernel" which passes the data to the "infinite kernel" through a channel.  

 

Is this the only way to have host to running kernel communications? It seems like a very clumsy system, but I guess it could work.  

 

Happy coding! 

Monstrumus
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Altera_Forum
Honored Contributor II
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Hi, 

 

There is another method. I haven't tried it myself, but it seems you might be able to use I/O channels or pipes to stream data between the host and the running kernel. In the programming guide (https://www.altera.com/en_us/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf), it says: 

 

 

--- Quote Start ---  

Include an io attribute in your OpenCL pipe declaration to declare a special I/O pipe to interface with 

input or output features of an FPGA board. 

These features might include network interfaces, PCIe, cameras, or other data capture or processing 

devices or protocols. 

--- Quote End ---  

 

 

I encourage you to read more in the guide and let us know how it works out. 

 

Smith
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Altera_Forum
Honored Contributor II
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From the Altera Programming Guide: 

 

 

--- Quote Start ---  

Consult the board_spec.xml file in your Custom Platform to identify the input and output features available on your FPGA board.  

--- Quote End ---  

 

 

In the case of my Nallatech board, there is no support for channels except for the network interfaces. However, in the Altera documentation there is a clear reference to a channel io named "pcie", so the support is there. There just need to be a support from a vendor for this feature.  

 

Thanks for the help Smith!  

 

Monstrumus
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