Is there a "shortcut" for truth tables in AHDL? Using Quartus

[Altera_Forum]

Not sure where to post, sorry if this is the wrong section. 

 I was just wondering if there's a shortcut for truth tables instead of writing out the whole table. (Kinda like how you can write b[4..0] + a[4..0] instead of writing out b4 + a4, b3 + a3....etc).   Background because I know I'm not very clear with the question - what I need to do is write an AHDL code using a truth table, to take a 5 digit binary input and convert it to a 6-digit BCD output. I have the truth table written (required for the lab report) but I'm writing the code for quartus and just curious if there's a way to shorten up the code a bit, instead of re-writing the whole 32 rows of data.   (and I'm very new to AHDL/quartus and a beginner at programming in general so please speak simply.) ;)  Thanks for any advice!

[Altera_Forum]

ETA: I've got the code written out now. But still curious as to whether or not there's a shorter method. (thinking of needing to convert / translate numbers into the millions or more, it wouldn't be very efficient to write out every single line). 

If anyone has quartus and wants to look I can send the file, see if you have any suggestions. (Just thinking that maybe seeing the program will be easier to understand).

[Altera_Forum]

You would be much better off writing your design in VHDL/Verilog/System Verilog. There are many more people that understand it, and its much much better supported.

[Altera_Forum]

Thanks. I've seen that suggested here on other posts. It's a class assignment though and we're instructed to use AHDL. (And yeah, I agree, since it's been said, waste of time to learn it if it's outdate / almost unused already, but...) 

I don't know much about either format so either one would be a challenge for me right now anyway.

[Altera_Forum]

Your best bet might be to browse the quartus help files. Theres alot about AHDL in there. 

 Pulled directly from the Quartus Help:    --- Quote Start ---   The Truth Table Statement is used to specify combinational logic or state machine behavior. In an AHDL truth table, each entry in the table contains a combination of input values that will produce specified output values. These output values can be used as feedback to specify state transitions and outputs of state machines.        The following example shows a Truth Table Statement:  TABLE   a0, f[4..1].q => f[4..1].d, control;  0, B"0000" => B"0001", 1;  0, B"0100" => B"0010", 0;  1, B"0XXX" => B"0100", 0;  X, B"1111" => B"0101", 1; END TABLE;  The Truth Table Statement has the following characteristics:

• The truth table heading consists of the keyword TABLE, followed by a comma-separated list of table inputs, an arrow symbol (=>), and a comma-separated list of table outputs. The heading ends with a semicolon (;). 
• Truth table inputs are Boolean expressions; truth table outputs are variables. In the example shown above, the input signals are a0 and f
• The body of the table consists of one or more entries, each spanning one or more lines and ending with a semicolon. 
• An entry consists of a comma-separated list of inputs and a comma-separated list of numerical outputs. The inputs and outputs are separated by =>. 
• Each signal has a one-to-one correspondence with the values in each entry. Thus, the first entry in the example shown above signifies that when a0 has the value 0 and f
• Input and output values can be numbers, predefined constants VCC or GND, symbolic constants (that is, symbolic names used as constants), or groups of numbers or constants. Input values can also be X (don't care). 
• Input and output values correspond to the inputs and outputs of the table heading. 
• The keywords END TABLE, followed by a semicolon (;), end the truth table.

  --- Quote End ---