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Hi All,
Is there a way to verify Pins Assignment (Location, IO Standard, etc) before running the Full Flow (Synthesis, Fitter, etc)?
Thank you!
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Hi,
There is a way to validate the pin assignment against predefined I/O rules for target device. in Chapter 3.4 as the link below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-design-constraints.pdf
Thanks
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