Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Issue about instruction register length

Altera_Forum
Honored Contributor II
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I can find below words, 

 

"The instruction register length is determined automatically by the Quartus II JTAG server." 

 

But, i really want to know what's the exactly value or range. For i worry about that my instructions' number of visual jtag would beyond its range. 

 

There are many visual jtag instrucions when i design VJ interface to debug my project, so this is a serious issue for me.
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Altera_Forum
Honored Contributor II
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The IP core is called virtual jtag, not visual JTAG. 

 

The calculation of the Virtual Instruction encoding and length is documented in more detail than the Altera documentation in here: 

 

http://www.ovro.caltech.edu/~dwh/correlator/pdf/vjtag.pdf 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Hi Dave: 

 

Thanks!
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