Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Iteration limit 5000 reached at time X ns.

akhal10
Beginner
‎03-01-2019 01:17 PM
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Hi,

I'm an absolute beginner to this world, i've made a schematic for my design then compiled it (which done successfully) then run the simulation first i hadn't set any input to high and everything worked fine but when i set whatever input to high (except the clock for sure) i got "Iteration limit 5000 reached at time X ns." error, where "X" is the time i set the input pin to high. so what's the problem and how to fix it?

 

environment:

  • Quartus prime lite 18.1 Linux version
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Vicky1
Employee
‎03-04-2019 03:43 AM
587 Views
Hi Abdullah, This issue may occur because of delay.. Could you please provide the schematic & corresponding HDL code for the design used? Regards, Vikas
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