FPGA Part number is EP4CE15F17C8N (Cyclone iV)
However i find the reason that is naming of negative pin.
Whenever define one of differential pin, tool generate name(n) automatically.
After that i annotate back it to Design PIN.
This is error happen.
Can you teach me how to process differential PIN define correctly?
There are many ways you can do ; usually way i do is assign the signal I/O standard as "LVDS " and assign the xxx_p pin in the pin planner or assignment editor or qsf assignment, then xxx_n will automatically assign by the tool .
Hope helps ;