I need a solution for the Altera's digital logic laboratory exercise, especially the exercise about memory block (lab8). I'm a student so i guess i cant request these solutions from Altera, then i come here and hope someone can help me to solve my problem. i'm working on DE1 development board and using VHDL.
i'm making a small game to practice about vga, ps/2, audio codec and the others stuff. my problem is the sound data is too large to store in the onchip memory so i want to store it somewhere else. what i'm looking for is a way to write a whole file to sram. i know this is an old question, i did search around and found a lot of related thread here, but honestly i havent figured out how to do it. i dont know anything about nios system, sopc, avalon bus, etc.. all i want to do is to load (initiate) a hex file to the sram chip, and then read data from it later. i read the 8th laboratory exercise and at the final part, they ask us to modify part6 to use the sram chip instead of M4K blocks. So, if i'm not misunderstanding, then we can use the In-system memory content editor to modify the sram chip, right? please tell me if i wrong. my project is going to deadline, and i tried to request solution from altera but they didnt response yet :( if you know any other solution to store the data than using the sram chip, i would appreciate very much too. Linh.链接已复制
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Hi, I don't know laboratory exercises.
If you want to write to sram, ther is pratically nothing more than writing data to an (big) array variable, a (big) structure in your C program. --- Quote Start --- the 8th laboratory exercise and at the final part, they ask us to modify part6 to use the sram chip instead of M4K blocks --- Quote End --- What is part 6 ? SOPC/QSYS editor ? OR C program ? OR other thing ? Have you made "hello world" project before ? Are you familiar with SOPC/QSYS, NIOS II IDE/SBT, BSP (which interfaces SOPC/QSYS to your software by generating "system.h" (with others) ? --- Quote Start --- we can use the In-system memory content editor to modify the sram chip, right? --- Quote End --- NO, "In system memory content editor" is a megawizard that help you to employ some on-chip dual port RAM on which you can read or modify through JTAG. I use them as "modifiable" constants for coefficients of a FIR, IIR... Other solution : It depends of how you get sound data : a lonely 8 bits, 16 bits Integer, 24 bits floating point... Does Your sound data come from a buffer ? In which case you have to read multiple times and store each data to an array. The question is : do you have SRAM somewhere in your SOPC/QSYS and BSP editor ? OR..... Maybe you have to write at a special address Regardsthanks for your reply,
part6 is the 6th exercise in the laboratory exercises :cry: and i already said that i dont know anything about SOPC/QSYS... if you think the in-system memory content editor wont work, then i have nothing to do with it anymore :( but the problem still exists. about how i get the sound data: i dont really understand your question, i edit the mono-signed 16bit-PCM wav file and export to an ASCII text file. i edited that file to a .mif and initiate the 1port onchip ROM and everything works. i just wondering if there is a way to store those data to somewhere else (without using the sopc)I understand that you want to put a music or a sound to your board in a Read Only Memory, right ? And those data are too big to put on On-chip ROM ?
There are other place (SRAM) where you can put your data BUT Those sound data must exist before copying this from a ROM to SRAM. You need ROM for a standalone board. You can use In-system Memory Content Editor to employ on-chip RAM that you can "initialize" with your data sound but you said that sound data is too big. I don't think you can initialize SRAM. Maybe you have to work on your data sound.yeah i think i must accept the fact that i cant initialize the sram directly. but im working on another way. because the Flash memory's data retain even after the board power off, so i think i can use the control panel to write those data on Flash chip, and then create a state machine to load data from FLASH to SRAM at the begining of the game :D
please confirm if it's possibleYou don't work with Nios II ?
it will be tedious, complex (and very boring) for a beginner write vhdl code for that. you go to the wrong way, i think. Because it is just a laboratory exercise : means pre-working board, just change a few thing, doesn't it ? You can make this way for very small design. Because your design employ PS/2, codec, vga. I think you should use the NIOS II/e (obviously with SOPC/QSYS) to get it more simple, faster.