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Hi all ..
my project is alarm clock .. and i'm going to write the code using Verilog code but one thing that i don't know how to use it :( the LineOut port on altera DE1 how can i write the code to get sound when the alarm done? and can de1 generate sounds?? or i must line in sound to get it out ? any one can help me with that?Link Copied
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I'm pretty sure that's the point of the class..
Learning verilog. And figuring out how to talk to the hardware.. I haven't looked at the DE1 lately, but there should be a codec between the FPGA and line-out. First dig up the datasheet for that part, and figure out how to send data to it.. (Most likely an I2S interface) Then write the verilog code to send some 1-KHz to 5 KHz tone tone to the CODEC, for Line-out. If you can make it make a tone, you can then work on the alarm clock portion. Pete![](/skins/images/7FDC486457F5FB4D87FED5D8C92AC987/responsive_peak/images/icon_anonymous_message.png)
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