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Many flow control statements required

Altera_Forum
Honored Contributor II
‎12-24-2013 06:51 AM
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I have to map the OpenCL application with a lot of flow control statements, it works well on GPU. However, it incurs deadlock on FPGA.  

 

What is the difference? What should I do? What should I read? Merry Christmas.
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Altera_Forum
Honored Contributor II
‎01-06-2014 06:57 PM
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Without seeing the code I'm not sure we'll be much help. Make sure you don't have any barriers or fences inside a conditional statement. The scheduling of work-items on an FPGA can vary with respect to a GPU so perhaps there is a hazard not being addressed in the kernel.

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