Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

Max10m50 dac+adc

Honored Contributor II


i want to get the input data from ANAIN1 SMA, through ADC and then to the DAC8551, and then to get it out through DACOUT SMA. 


is there any reference design using DAC and ADC together? 

how do i sync the clock and the data? 

how do i implement the DAC8551 in VHDL? 



thanks Dor
0 Kudos
0 Replies