ModelSim memory use problem / crash

[Altera_Forum]

// old title: modelsim memory use problem / crash// 

//----------------------------------------------------------------//   Hi all I want to simulate FIR filter with ModelSim. The design is pretty complex. The problem is that when I run simulation ModelSim shows me warning something like "Using xxx memory of needed xxx. ...may cause disk paging". After this message ModelSim just exits.  I tried to add more ram but the result is the same. Something from the `timescale ??

[Altera_Forum]

ok i fixed it... me bad... :o  

 So now I can see that my design is not working :) After closer look I saw that the multipliers are not multiplying. Their result output is always in 'z' state.   Then I tried to simulate in ModelSim single multiplier generated with LMP_MULT Quartus megafunction.  I read that when I compile the design in Quartus it should generate VO and SDO files. And if I want to simulate in ModelSim I should add the VO file in the project.  So now I have MULT.V, MULT_BB.V and MULT.VO files in my ModelSim project. The file MULT_V.SDO is in the project's directory. And I have compiled MULT.VO to STRATIXII library. ...and modelsim gives me:  # ** Fatal: SDF files require Altera primitive library # Time: 0 ps Iteration: 0 Instance: /m00 File: C:/Documents and Settings/develop/Desktop/PRJ/m00_bb.v  If I use only the two generated from quartus files mult.v and mult_bb.v I can start simulation but again the result is Z state.  What is wrong?? I spend all day trying to fix this. Can someone explaint to me pls how can I simulate multiplier in modelsim... :( :confused:

[Altera_Forum]

*.vo would be used for a gate-level simulation only, you didn't tell which kind of simulation you're intending. Cause you are also dealing with *.v design files, I guess, you plan a functional simulation. (That would be the first step in design simulation anyway). If so, forget about *.vo and *.sdo first, but supply the necessary libraries. That's somewhat long-winded with Verilog and ModelSim, to my opinion, cause you have to reference anything explicitely, VHDL simulation is basicaly satisfied with library uses in design files.

[Altera_Forum]

ok...so I want functional simulation. :) 

I'm using ModelSim-Altera. I think it should have all necessary libraries. Anyway if i'm not using .vo etc I can start simulation but as I told before the result of the multiplication is Z. Why is that?? Is it because I use quartus megafunctions/primitives and ModelSim somehow can't simulate them correctly or something else??

[Altera_Forum]

A usual reason for 'Z' logic values is that design entitities haven't been loaded during simulation startup. You allways get a warning then, but it may be overlooked among a shower of informational messages. ModelSim can simulate Altera Megafunctions and device specific hardware very good, but the libraries, e. g. altera_mf must be present. I'm not familiar to the ModelSim Altera Edition or Verilog simulation, so I just can say: follow the suggestions in the documentation and check the warnings during simulation. 

 Another possible source of 'Z' states is using a PLL without the necessary 1 ps timing resolution. All PLL generated clocks remain inactive then.