ModelSim wave.do - extra inputs in Wave window

[LChow3]

When I open the previously saved wave.do, I always get the extra inputs in the Wave window:

The inputs in the red box do not have the previously saved values. But those inputs in the yellow box have the previously saved values. 

Why are there extra sets of inputs when I type "do wave.do"?

Is there any way to load my previously save wave without loading the extra set of inputs?

[RichardTanSY_Intel]

Hi @LChow3 

Do you create a modelsim project and run the "do wave.do" in it? Perhaps you could help to share your simulation flow (steps by step on how to simulate your project). 

You may try to type restart at the transcript before you run the .do file. 

You may checkout the User Guide below on how to simulate your design.

Quartus Standard: https://www.intel.com/content/www/us/en/programmable/documentation/aym1499789502823.html

Quartus Pro: https://www.intel.com/content/www/us/en/programmable/documentation/yur1496247032051.html

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[LChow3]

I have recorded a video of my simulation flow. But I couldn't upload it here. Can I email it to you?

I didn't use testbench. I use the wave editor in the ModelSim. 

There is another problem, see the picture below. Although I have keyed in the input X = 1011, on the wave editor, it shows number 1000. Same problem with input Y = 1001, but the wave editor shows number 1000 again.

[RichardTanSY_Intel]

Hi @LChow3 

I have send an email to you, you may send the video by replying in the email. 

[RichardTanSY_Intel]

Hi @LChow3, 

The reason you might seeing 1000 instead of 1011 for X is probably due to the wave editor tool limitation as it only read the initial bit value of either 0 or 1. Thus if you put 0111, you will see 0000 instead. 

When you save format in wave.do, untick the Waveform formats if you do not want to see extra inputs.

Then add below command in the wave.do to show up the outputs simulation. 

add wave -noupdate /adder/s
add wave -noupdate /adder/cout

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[RichardTanSY_Intel]

As design getting larger and complex, I would recommend to learn to write testbench for simulation.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[LChow3]

Thanks. May I know where can I find the basic for learning the testbench for beginners? Can you send me the link?

Thank you. 

[RichardTanSY_Intel]

Hi @LChow3 

You can google it and find any open resources available. Perhaps this might be good for beginner. 

https://verilogguide.readthedocs.io/en/latest/verilog/testbench.html

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[LChow3]

Great, thank you.

[RichardTanSY_Intel]

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.