Multiple driver errors on Bidirectional pins while using Block-Based design

[mustafaarslan]

Hi,

I am using Quartus Pro Prime version 22.2.

I have zero errors when I have only one partition(root partition) on my design. Whenever I add a partition to design, I get multiple driver errors. I think that the problem is bidirectional pins on my parent block which I try to make it partition. How can I create partition with bidirectional pins?

Thanks.

[sstrell]

What are the exact errors you are getting?  How are your partitions set up?  All I/O should remain in the root partition and other partitions should include only internal logic.  More detail needed here.

[RichardTanSY_Intel]

You may checkout the design partition guidelines.

https://www.intel.com/content/www/us/en/docs/programmable/683247/19-4/design-partitioning.html

You may share your design .qar so we can investigate further on this. Please share the changes made in design that causes it to fail.

[RichardTanSY_Intel]

Since there are no feedback for this thread,  I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,

Richard Tan

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.

[mustafaarslan]

I have a partition (fpga_top) that I want use its final snapshot:

I have bidirectional pins on that partition:

I assign that bidirectional pins on top module (fpga_wrapper):

Synthesize failing in this case:

When "fpga_top" is not a partition, compilation finished successfully. Sharing .qar file.

Thanks.