Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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NIOS system generate, compiling and run trouble.


Hi there.
I have a curious troubles with system building.
On Cyclone 10LP board I`m trying build NIOS system with Pattern generator and mSGDMA S-MM.
System build via Platform Designer, then Quartus 18.1 building, and start in Eclipse with HelloWorld project and add mSGDMA code.
The problem is, everything works fine, to the moment, when I try change any parameter, for example in mSGDMA IP (max data length) in System designer, or Quartus top verilog file (some GPIO LED operation). After generating qip and building in Quartus and successful generate BSP  and eclipse build without errors, or critical warnings, sometimes NIOS does not run, or failed verification, or doesn`t fit system ID.  I had many types of fails. The same error is then still present after change parameter back and repeat all compilation steps again. The only solution is delete project and renew from zip file.

Have You someone similar nondeterministic experience with Quartus and can help to find solution please?


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Honored Contributor III

Any time you regenerate a system in Platform Designer, a new .qip is created.  I presume you are using Standard, so make sure the correct .qip file has been added to your Quartus project.

Another option is to remove the .qip from the project and add the .qsys to it instead.  That way, every time you compile your Quartus project, the system will get regenerated and you don't have to worry about pointing to the correct .qip.

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