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Hi,
I am having a rather odd issue with timequest. I get many errors (slack time fail) of very small amounts no matter how I adjust the optimization. The weirdest part is that the errors are from a node to itself. How is that even possible? Here is an example, this was worst case fast model, i have similar ones from the slow model, time (ns) and then "from node" and then "to node": ******************* -0.005 RX_SIG_PROC:\sig_proc_gen:DATA_PROC|dec5fir3:LPF3_I|dec5fir3_ast:dec5fir3_ast_inst|dec5fir3_st_wr:fircore|mr_dnc_wr:u1|cnt_reg[2] RX_SIG_PROC:\sig_proc_gen:DATA_PROC|dec5fir3:LPF3_I|dec5fir3_ast:dec5fir3_ast_inst|dec5fir3_st_wr:fircore|mr_dnc_wr:u1|cnt_reg[2]********************************** -0.005 RX_SIG_PROC:\sig_proc_gen:DATA_PROC|dec5fir3:LPF3_I|dec5fir3_ast:dec5fir3_ast_inst|dec5fir3_st_wr:fircore|mr_dnc_wr:u1|cnt_reg[1] RX_SIG_PROC:\sig_proc_gen:DATA_PROC|dec5fir3:LPF3_I|dec5fir3_ast:dec5fir3_ast_inst|dec5fir3_st_wr:fircore|mr_dnc_wr:u1|cnt_reg[1] ********************************** I get a lot more of these as hold violations in slow model than fast model. These aren't signals that feed back it's just part of a normal data source->do_stuff->do_stuff->output . Anyone seen this before? I don't understand how you can have a slack violaiton on the same node. This is a relatively slow 25-30Mhz Cyclone 3 design.Link Copied
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Can you post your sdc file contents?
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Hi,
did you ever get to the bottom of this issue? I seem to be getting the same problem! Trilby- Mark as New
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To any one unlucky enough to come across the same situation, try ticking the Common Clock Path Pessimism removal option in TimeQuest options and recompile.
Details of this function can be found in: http://www.altera.com/literature/hb/qts/qts_qii53018.pdf Thanks to alt1000 (the original poster) for supplying this solution.
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