Hello,
I would like to use VHDL blocks developed with OpenCL and for this, I first followed the first example (https://www.altera.com/support/support-resources/design-examples/design-software/opencl/library-desi...), example 1. I followed all the steps described in the README.html but when I run the executable ("bin/host"), this one returns a "segmentation fault" without even launching the file.# elie@r423-2 (~/elie/tests_and_examples/exm_opencl_library_example1_x64_linux_16.1/library_example1):
(11:12:12) -> ls
bin device host Makefile README.html reprogram_temp.sof# elie@r423-2 (~/elie/tests_and_examples/exm_opencl_library_example1_x64_linux_16.1/library_example1):
(11:24:02) -> bin/host
Segmentation fault
I have tried others examples and they executed successfully. I am targeting ReflexCES alaric Arria 10 board. Has anyone come across this error before? I welcome any suggestions. Thank you!
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I received the same error. I commented out the part of the code that reads in the number or command line arguments and it seem to work fine.
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