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Hello, I am currently struggling to make the example provided in ftp://ftp.altera.com/up/pub/intel_material/16.1/tutorials/opencl.pdf work.
The compilation seems to be stuck forever. It's been going on for several hours already. I really have no clue on what the problem could be. This is the command I'm trying to make work --- Quote Start --- aoc device/vectorAdd.cl -o bin/vectorAdd.aocx --board de1soc_sharedonly --- Quote End --- Note that I changed the name provided in the tutorial vector_add to vectorAdd to match the actual name. However, I tried running the boardtest example with the same result, which had already the same name. The command aoc --list-boards does correctly return de1soc_sharedonly. I attached the quartus_sh_compile.log which I learned could help in troubleshooting from another thread. I am currently running Windows 10 Education 64 bit ( 10.0, build 14393 ), with Quartus Prime 17.0 Build 595 04/25/2017 SJ Standard Edition and a Terasic De1SoC board. My system has 16GB of ram memory, 63.7 GB of free space on the SSD where quartus and opencl are installed, and a 5930k Intel core i7 processor. This is the output of the command aoc --version: Version 17.0.0 Build 595 Copyright (C) 2017 Intel CorporationLink Copied
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Based on the log, it seems the compilation is still ongoing until you kill it. Compilations can take up to 12 hours for Arria 10, but they should be much faster for Cyclone boards. I recommend updating to the latest v17.0.2 and retrying. Also make sure you use the design files from this link (https://www.altera.com/support/support-resources/design-examples/design-software/opencl/vector-addition.html). You can also add -v --report to your compilation command to get more verbose output in stdout.
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Actually I forgot something very important. Terasic's BSP for this board is for Quartus v16.0, you should NOT use Quartus v17.0 to compile kernels for this board. I suggest trying v16.0.2. If it worked, you can also try v16.1.2. v17.x will very likely not work due to the numerous changes done in Quartus compared to v16.x.
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--- Quote Start --- Actually I forgot something very important. Terasic's BSP for this board is for Quartus v16.0, you should NOT use Quartus v17.0 to compile kernels for this board. I suggest trying v16.0.2. If it worked, you can also try v16.1.2. v17.x will very likely not work due to the numerous changes done in Quartus compared to v16.x. --- Quote End --- The example worked in my installation, with Quartus v16.1.2 under Ubuntu 16.04.3. However, I had to modify the Makefile which generates the vector_add executable, since it fails to link the shared library libacl_emulator_kernel_rt.so. My diff with the original Makefile is as follows: 37a38,39 ># GS20170907: hackfix to ld warning (appended to 'all' target): > AOCL_LINK_CONFIG_EXT=-lacl_emulator_kernel_rt 41c43 < $(CROSS-COMPILE)g++ $(SRCS_FILES) $(COMMON_FILES) -o $(TARGET) $(AOCL_COMPILE_CONFIG) $(AOCL_LINK_CONFIG) --- > $(CROSS-COMPILE)g++ $(SRCS_FILES) $(COMMON_FILES) -o $(TARGET) $(AOCL_COMPILE_CONFIG) $(AOCL_LINK_CONFIG) $(AOCL_LINK_CONFIG_EXT) The same correction is to be made to the Makefile of the boardtest example. The aoc utility took 32 min. to compile the OpenCL kernel. The execution of the example on the board was very quick and gave the following output: root@socfpga:~/mytests/vector_add# ./vector_add Initializing OpenCL Platform: Altera SDK for OpenCL Using 1 device(s) de1soc_sharedonlyCyclone V SoC Development Kit Using AOCX: vectorAdd.aocx Reprogramming device with handle 1 Launching for device 0 (1000000 elements) Time: 164.118 ms Kernel time (device 0): 6.918 ms Verification: PASS
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