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After merging the PCie x4 and X8 hard ip. PC is taking more number of reboot to detect the pcie.
we are using fpga as a device, the one observation is from PC we are not getting the continous clock. if we enable the continous clock from PC will it affect the FPGA pins?
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Hi,
Enabling the continuous clock from the PC should not directly affect the FPGA pins.
However, it is important to ensure that the FPGA is properly configured to receive the continuous clock signal from the PC.
Not sure about your device, so is possible for you to use the GX/GT device, they can support up to 4 HIPs If no ,
back to your question , there is no setting to configure the HIP to support Avalon-ST and Avalon-MM both,
but you can use the Avalon-ST and implement some logic for the control path
Regards.
Wincent_Intel
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Hi Sir,
Thank you for your reply. I have 2 questions.
Q1. my PCIe Device is self powered. In any scenario. If Device is OFF and PC is ON. and PC provides the PCIe Clock continuously will there be any impact on the PCIe EP device(FPGA)? I am using arria 10 GX device .
Q2. If i check the x8 pcie and x4 pcie as a seperate code. it is working fine. I am using Avalon MM DMA method for both PCIe. If i merge the X8 and X4 pcie. PCie is not getting detected for the first two reboot of PC. What may be the issue?
Thanks in advance
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Hi ,
Can you provide me the LTSSM status ?
So that I can look at it and see what happen.
Regards,
Wincent_Intel
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Hi,
Pcie is not getting detected , i am using the pcie clock only for stp. After merging the x4 and x8 pcie i am getting this issue.
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Hi Sir,
I will provide the ILA information. could you please provide the feedback for below question.
Q1. my PCIe Device is self powered. In any scenario. If Device is OFF and PC is ON. and PC provides the PCIe Clock continuously will there be any impact on the PCIe EP device(FPGA)? I am using arria 10 GX device .
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Hi,
I check internal resource, We never encounter this issue before.
Meanwhile, can you
- Ensure power, reset, clock specifications are being met, and review how device is connected to system as per mention in the user guide.
- I would recommend that you don't drive the power_mgmt bus. I suspect this is what is causing your problems.
- If you just use our auto-generated example design, re-targeted to your hardware, does it work correctly?
- https://www.intel.ca/content/www/ca/en/support/programmable/articles/000084214.html
Regards,
Wincent_Intel
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Hi,
I wish to follow up with you about this case.
Do you have any further questions on this matter ?
Else I would like to have your permission to close this forum ticket
Regards,
Wincent_Intel
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Hi
We have not hear from you and this Case is idling. It is not recommended to idle for too long.
Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause
Hence, This thread will be transitioned to community support.
If you have a new question, feel free to open a new thread to get support from Intel experts.
Otherwise, the community users will continue to help you on this thread. Thank you
If you feel your support experience was less than a 9 or 10,
please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.
Regards,
Wincent_Intel

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