Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

PIN assign error in DDR4

srinivasan
Beginner
97 Views

Hi,

Error(19179): The EMIF interface has an input connection from the core (tg|tg|not_srw.gen_avl_mm_driver[0].normal.inst|not_srw.amm_1x_bridge|amm_slave_byteenable[4]) that does not connect to a pin. Please review the top-level design to make sure all memory interface signals are connected to the top-level..

i am getting this error while doing compilation...but all my top level signal has made pin assignments...evethough i am getting this error...can anyone rectify this error?

0 Kudos
0 Replies
Reply