Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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PLL in LVDS mode, Cyclone II

Altera_Forum
Honored Contributor II
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Apologies if this has been covered before, I did a quick search of the forum.. 

 

This is my first time using LVDS with our Cyclone II device. I've used the ALTLVDS megafunction deserialiser and it seem to be just what I want. So far so good. 

 

I also want to create a 10x LVDS clock output using a PLL. I can't get the "Create PLL in LVDS mode" button to light up. Does this not work in Cyclone II? 

 

If I try to define a standard PLL pin output as LVDS, the fitter rejects it. If I send a single ended PLL clock signal to a LVDS pin as an output, it moans about jitter. 

 

Am I attempting the impossibe??  

 

:-) 

 

Pete
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