Pin Naming

[Altera_Forum]

Hi, 

 Is there any slick way of naming a bunch of pins by copying in from say an Excel spread sheet?  My top level is a BDF and I have placed 100 input pins that have been named by Quartus as pin_name1, 2, 3, etc. I would like to select all of these symbols, edit, and copy in names from an already existing spread sheet; as opposed to individually selecting them and entering in one at a time.  Thank you, Rob

[Altera_Forum]

You could edit the .qsf file. 

 It contains lines like   set_location_assignment PIN_K2 -to pin_d3_0[0] set_location_assignment PIN_J2 -to pin_d3_0[1] set_location_assignment PIN_L4 -to pin_d3_0[2] set_location_assignment PIN_J4 -to pin_d3_0[3] set_location_assignment PIN_H2 -to pin_d3_0[4] set_location_assignment PIN_G2 -to pin_d3_0[5] set_location_assignment PIN_G3 -to pin_d3_0[6] set_location_assignment PIN_F2 -to pin_d3_0[7]   Make sure the project isn't already open in Quartus or you may lose your changes.   The file header reads   # Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten.    So do this at your peril ;)

[Altera_Forum]

That won't actually change the pin names though. This is one of the problem with schematics, as a lot of the cutting and pasting things just don't work. You will have to hand-enter them. You could also try VHDL/Verilog. Take your .bdf and go to File -> Create HDL File for Current File. Then you can edit the HDL. (It's still going to take some manipulation, but text manipulation is generally much easier.) Note that you won't be able to convert it back though, i.e. you're committing to learning HDL, which isn't a bad thing.

[Altera_Forum]

RYSC, Fair point! 

 I don't think I read the post correctly :confused:   Sorry for any confusion caused

[Altera_Forum]

--- Quote Start ---  That won't actually change the pin names though. This is one of the problem with schematics, as a lot of the cutting and pasting things just don't work. You will have to hand-enter them. You could also try VHDL/Verilog. Take your .bdf and go to File -> Create HDL File for Current File. Then you can edit the HDL. (It's still going to take some manipulation, but text manipulation is generally much easier.) Note that you won't be able to convert it back though, i.e. you're committing to learning HDL, which isn't a bad thing.  --- Quote End ---    I like the top level to be schematic--it helps show the flow better. I use Verilog for everything underneath the top level. Yes, I could use Verilog as the top level but I thought there might be a way to copy names in from Excel like you can do for pin numbering.  Thank you!

[Altera_Forum]

I agree about the top-level schematic being nice, and for the same reason. What you can do, if the top-level port names match what they're connected to, is drop down a symbol, right-click -> Generate Pins for Symbol Ports. I use this quite a bit for quickly throwing something into a schematic.

[Altera_Forum]

--- Quote Start ---  I agree about the top-level schematic being nice, and for the same reason. What you can do, if the top-level port names match what they're connected to, is drop down a symbol, right-click -> Generate Pins for Symbol Ports. I use this quite a bit for quickly throwing something into a schematic.  --- Quote End ---    Now, that is a neat feature I never knew was there--thanks!