Place and Route manually

[Altera_Forum]

Hi everyone, 

 I am wondering if there is any way to do place and route in FPGA manually?   Thanks,

[Altera_Forum]

yes. you could creat your design out of luts and registers and then logic lock them all. but why would you want to?

[Altera_Forum]

Thanks for your reply. 

I am proposing an analytic power model for Network switch components in FPGA, I need to estimate the power consumed in some wires connecting the components by PowerPlay Analyzer. In my design, I need to fix the place of each components and interconnection wires too. How can I create design out of LUTs and then logic lock them all?

[Altera_Forum]

power analyser can be used on any normal P&R'ed design. Is there any reason you want to P&R manually? its not an easy task and not recommended

[Altera_Forum]

Yes, when I add new module in switch design, the wire routing will change. for Analytic power model I need to keep the wiring as before. 

How can I create design out of LUTs and then logic lock them all?  Thanks

[Altera_Forum]

well if you change the design, then the number of ALUTs needed will change. 

 WHat are you thinking of in terms of design? just a few gates, or some serious IP? even with fairly simple IP it will probably be a few hundred LUTs you'll need to place, and they will all need placing individually.

[Altera_Forum]

Is there any way to place and route synthesized modules instead of LUTs in FPGAs?

[Altera_Forum]

I dont understand how the power is so critical. A few extra gates will not make any difference to the power.

[Altera_Forum]

Adding few extra gates may change the wire routing in FPGA. in this case, the new routing power is considered in the power estimation. So, it is impossible for me to measure the accurate wire power.