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I'de like to make a powerplay analysis of NIOS running a code I've develop.
How could I do that? Does anyone have pointer that could help me? Thanks So no idea guys?Link Copied
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Sorry to do that !
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Hello,
Take a look at http://www.altera.com/literature/an/an351.pdf. This document explains how to simulate (at the RTL level) Nios II within ModelSim. Once you are able to simulate the execution of your software application on Nios II w/ ModelSim, use the Quartus II 7.0 handbook (see Chapter 10, PowerPlay Power Analysis starting Page 1853). It explains how power analysis can be done using signal activities derived from VCD files generated w/ ModelSim. Hope this helps. --jmv- Mark as New
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I had a quick look to the information you gave me and it seems to be possible!
thanks a lot!- Mark as New
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Hi.
I've followed the steps shown in AN351 and the simulation of my Nios II system run successfully in ModelSim. I've also followed Handbook Chapter 10 and generated a VCD script. I typed "source the-vcd-script.tcl" in the console window of ModelSim before running the simulation. But nothing was written in the vcd file. I've checked the vcd script and found that the names shown there didn't match with the objects in ModelSim. So I'm just wondering if anyone has successfully estimated the power consumption of a Nios II system. If so, could you please give me some pointers? Thank you very much. Best Regards, oche007- Mark as New
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hi,
how can i measure the power consumption in Quartus 9.1 (webedition)? can you give me quick steps because i don't know anything how i can do it.. best regards- Mark as New
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static power is that of routing/logic module/io.
dynamic power is that of clocked logic and depends on clk frequency and toggle rate.If you don't have clock you don't have dynamic. To get toggle rate: First set simulation output file to SAF then run a simulation then go to power analyser and set it to SAF. The important thing you get from simulation is the toggle rate. Alternatively do your own toggle rate maunally(not easy): toggle rate is meant to be 100/% for any signal that toggles up/down on every clock(clk itself is viewed as 200% by power analyser). example:for 16 bit counter the toggle rate is 12.5% average of all 16 outputs.- Mark as New
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thanks.
but i'm a very low beginner with the powerplay tool. i have for my project a nios core and a project with more .c files. now i wil know how much power consumption this project have. can you help further?- Mark as New
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Hi, I'm having touble with the PowerPlay tool in Quartus II. I'm a beginner to this software. I have generated the reqd vwf , vcd and saf files but when i run the PowerPlaytool i keep getting an error saying ' Successful run of Assembler reqd' . I the run the fitter and assembler from the processing/start menu , but i still receive the same error. I would be greatful if you could help me .
Thank You.
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