Firstly sorry for my English, I used a translator.
I'm trying to declare a variable SIGNED , plus modelsim returns me the following error: "(vcom-1078) Identifier "signed" is not directly visible."
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.all ;
use ieee.std_logic_unsigned.all ;
use ieee.std_logic_signed.all ;
ENTITY test IS
PORT(
clk : in std_logic;
saida : out sfixed(5 downto -20) -- double
);
END test;
ARCHITECTURE comportamento OF test IS
signal B_signed : signed (3 downto 0) ;
begin
end comportamento;
att,
Joao Pedro
