Sigasi invites all VHDL designer for the Public Beta program for Sigasi HDT, an Intelligent Development Environment (IDE) for VHDL ( http://www.sigasi.com/publicbeta (http://www.linkedin.com/redirect?url=http%3a%2f%2fwww%2esigasi%2ecom%2fpublicbeta&urlhash=v1bs&_t=disc_detail_link) ).
Sigasi HDT (Hardware Development Toolkit) is a powerful VHDL development tool that assists designers in reading, writing and modifying VHDL more accurately and faster. It differs from other development tools in that it contains an ultra-fast VHDL parser and compiler that runs transparently in the background (
http://www.sigasi.com/product (
http://www.linkedin.com/redirect?url=http%3a%2f%2fwww%2esigasi%2ecom%2fproduct&urlhash=7iv8&_t=disc_detail_link) ).
Through the Public Beta program, VHDL designers join a community that takes advantage of modern development techniques. To participate in the program, please visit
http://www.sigasi.com/start (
http://www.linkedin.com/redirect?url=http%3a%2f%2fwww%2esigasi%2ecom%2fstart&urlhash=f9wx&_t=disc_detail_link) .
