Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Q14.1 build nios system with jtag_uart problems

Altera_Forum
Honored Contributor II
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hello guys,i found some problems while using qsys system to build my nios cpu, the problem happens while using jtag-uart, there's no error message about qsys-system-builder, but there's about 5 errors in quartus-builder. 

 

 

 

the image is the error happened again. 

http://www.alteraforum.com/forum/attachment.php?attachmentid=10435&stc=1  

 

 

and here is the error message. 

Error (11176): Generation stopped, 4 or more modules remaining 

Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub" 

 

 

 

 

 

this built environment is quartus II 14.1 web edition 

and my system is win8.1 x64 ,zhtw 

 

 

and building project is "BeMicro MAX 10 FPGA Evaluation Kit"- On-die Temp Sensor (BeMicro) 

 

 

https://cloud.altera.com/devstore/platform/14.1.0/on-die-temp-sensor-bemicro/
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