Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16556 Discussions

QSys Get component instance name in generation callback

CHebl
New Contributor I
524 Views

I currently want to generate timing constraints for a custom QSys component.

To write the constraints correctly I need to include information about the hierarchical design to only constraint nets in the specific component, since other components might differ in parameters and thus in the genrated timing constraint (different generated clocks, etc.).

For this I would like to get the instance name in the generation callback in QSys, which I haven't been able to do.

Using the parameter of the generation callback doesn't work, since it yields he module name and using HDLINSTANCE_GET_GENERATED_NAME doesn't work, cause it only generates unique names inside a wrapper, which will repeat when you instantiate multiple wrappers and thus don't work for the constraints.

Do you know a way to get the instance name?

Many thanks for help.

0 Kudos
2 Replies
SyafieqS
Moderator
460 Views

Hi Christian,


Assuming I understand your question correctly, you probably can get use of RTL Viewer or Technology Map Viewer post-fit to get the instance name after synthesis


0 Kudos
SyafieqS
Moderator
444 Views

May I know if there is any update?


0 Kudos
Reply