Qsys instance parameters in generated verilog

[Altera_Forum]

I have a Qsys project, where I have added a couple parameters in the "Instance Parameters" tab. Using the 'instance script', I can ensure that these parameters are propagated to my instances. However, when I generate the top-level Verilog for my Qsys system, the instance parameters do not show up as verilog parameters. 

 According to the documentation:   --- Quote Start ---  The instance parameters tab in Qsys allows you to create instance parameters that enable instances of a Qsys system to be configured when the instances are added to other Qsys systems  --- Quote End ---    So, my Qsys system parameters can be configured by a parent Qsys system, but what about by a parent HDL module in Quartus? Is this not possible? Is there no way for Qsys to generate a parameterizable module for use in parent HDL modules?  Thanks!

[Altera_Forum]

--- Quote Start ---  I have a Qsys project, where I have added a couple parameters in the "Instance Parameters" tab. Using the 'instance script', I can ensure that these parameters are propagated to my instances. However, when I generate the top-level Verilog for my Qsys system, the instance parameters do not show up as verilog parameters.  According to the documentation:   So, my Qsys system parameters can be configured by a parent Qsys system, but what about by a parent HDL module in Quartus? Is this not possible? Is there no way for Qsys to generate a parameterizable module for use in parent HDL modules?  Thanks!  --- Quote End ---    I have the same question, but I see nobody answered this yet. Is it possible to have your Qsys Instance Parameters show up in the generated top-level Verilog wrapper as module instance parameters? I already define my parameters outside of Qsys and would like to feed them into my Qsys instance without having to redefine them in the Qsys GUI.

[Altera_Forum]

I haven't figured this out yet, but an answer would be greatly appreciated!

[Altera_Forum]

Actually, I just realized why this would not be feasible. 

 Let's say you actually could "export" your Qsys instance parameters in order to alter them when instantiating your top-level Qsys system. Now if any of your sub-components in your Qsys system which are also driven with those Qsys instance parameters (via the instance script) use those parameters to define port widths, it would be impossible for the Qsys Generator to generate code other than with what the instance parameter defaults are. You would basically have to be able to hook up your top level instance before you generate it - which of course is impossible.

[Altera_Forum]

My understanding is that it is not possible to propagate qsys system parameters post-generation. 

 The component/instance parameters work fine as long as you instantiate the .qsys inside other .qsys systems, the limitation is that the instance parameters that you add to your .qsys are not converted into top level RTL parameters (they are only .qsys instance parameters and can only be used within QSYS).  Here is an example of how to put into the Instance Script field inside the Instance Parameters tab :  package require qsys 13.1  set_module_property Composition_callback My_callback proc My_callback { } {  # Get The Value Of system_id parameter from the # higher-level system set top_id [get_parameter_value system_id]  # Print Info Message send_message Info "system_id Value Specified: $top_id"  # Use Above Value To Set Parameter Values For The Subcomponents set child_id_0 [expr {$top_id + 1} ] set child_id_1 [expr {$top_id + 2} ]  # Set The Parameter Values On The Subcomponent Instances set_instance_parameter_value comp0 My_system_id $child_id_0 set_instance_parameter_value comp1 My_system_id $child_id_1  # Print Info Messages send_message Info "system_id Value Used In comp0: $child_id_0" send_message Info "system_id Value Used In comp1: $child_id_1" }