Quartus 25.1.0 Not producing SOF File

[SDavi9]

I am running Quartus 25.1.0 with the Agilex device A5EC065BB32AE5S and for some reason it is not producing the SOF File. The Error message I am getting is :-

Critical Warning(18636): Compilation Report contains advance information. Specifications for device A5EC065BB32AE5S are subject to change. Contact Intel for information on availability. No programming file will be generated.

[RichardTanSY_Altera]

I will send you a Quartus INI to enable it.

Please check your email shortly.

Regards,

Richard

[SDavi9]

Dear Richard,

Thank you so much I received the Quartus INI and then the compile produced a SOF. The problem is when I tried to program the SOF I got the following error messages (after approx. 32%) :-

Error(18950): Device has stopped receiving configuration data
Error(18948): Error message received from device: Bitstream error. (Subcode 0x0093, Info 0x00000003, Location 0x00000800)
Error(18948): Error message received from device: Device only accepts compatible bitstream due to export control.
Error(23925): Debug suggestion: Please check that the board is being programmed with a compatible bitstream.

Also I had to change the device that I was compiling to A5EC065BB32AE5SR0 for the Quartus Programmer to even start !

Best regards

Shmuel 

[SDavi9]

Any Updates ?

[RichardTanSY_Altera]

I will bring this issue to the tool specialist for further investigation.

Please keep in mind that any work involving our engineering team may take some time—ranging from a few days to a few weeks—depending on the complexity of the issue.

Thank you for your understanding.

Just to emphasize: if your design uses the device A5ED065BB32AE6SR0, the compilation will complete successfully and generate the .sof file without issue. However, the generated .sof still encounters the same error message you're currently facing.

Regards,

Richard Tan

[RichardTanSY_Altera]

Typo: A5EC065BB32AE6SR0

[RichardTanSY_Altera]

Agilex™ 5 FPGA E-Series 065B Premium Development Kit

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/a5e065b-premium.html

Found out the Device OPN on the devkit should be A5ED065BB32AE5SR0 (with Crypto and HPS support) while your design is using Device OPN of A5EC065BB32AE5SR0 (without Crypto and HPS support).

To resolve the issue, you need to recompile your design/SOF with Device OPN of A5ED065BB32AE5SR0.

Regards,

Richard Tan

[SDavi9 · Accepted solution]

Dear Richard,

Thank you so very much - this worked ! I assume this but will be fixed in the next release of Quartus ? 

Bets regards

Shmuel 

[RichardTanSY_Altera]

I don't believe this is a bug. Users should ensure that the device OPN selected in both the design and the programmer is the same.

Could you clarify why you are using A5EC065BB32AE5S in the first place?

Regards,

Richard Tan

[SDavi9]

Dear Richard,

When I first started to compile the Golden_Top design in Quartus is when I got my first error. The Golden_Top design was configured for A5EC065BB32AE5S. Then the Quartus program wouldn't even start since it claimed that there was a A5EC065BB32AE5SR0 device on the development board. I had to change to this device within Quartus to get the Quartus Programmer to even start. But even with this change it stopped at 32%  with the error outlined above. 

You might want to update the Golden_Top design and the other design files with correct device configurations ?

Best regards

Shmuel 

[RichardTanSY_Altera]

Hi Shmuel,

Did you get the golden_top design from this webpage?

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/a5e065b-premium.html

I downloaded the installer package(agilex5e-prem-es-a5ed065bb32ae6sr0-v24-3-1b89-v1-0.zip) and opened the golden_top.qpf project. It shows that the design is targeting the A5ED065BB32AE6SR0 device.

Could you share where you obtained your version of the golden_top design?

Regards,

Richard Tan

[SDavi9]

Dear Richard,

I just open the original Golden-Top design and it does, as you pointed out, have the correct package. I must have made a mistake when trying to compile my design. Thank you for all your help 

Best regards

Shmuel 

[RichardTanSY_Altera]

I'm pleased to know that your issue has been addressed. 

Now, I will transitioning this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out. Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

The community users will be able to help you on your follow-up questions.

Thank you and have a great day!

Best Regards,

Richard Tan