Quartus RTL viewer bit order

[Paul_S]

The RTL viewer in Quartus Prime Pro 23.4 displays buses using the convention LSB:MSB for adder blocks, while older versions of Quartus used the convention MSB:LSB.   This has an impact on the displayed values of constant inputs to adders in the RTL viewer.

Is there any way to enforce a consistent convention in the RTL viewer?

[Kenny_Tan]

Can you attached two strip down design for our investigation?

1) Quartus Std design

2) Quartus Pro design

[Kenny_Tan]

Is there any update from the previous question?

[Kenny_Tan]

As we do not receive any response from you on the previous question that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.