Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

Quartus assembler crashes at 52% with an access violation

K_Crocker
New Contributor I
739 Views

The attached archive contains a project which consistently crashes during the assembly phase. Help would be greatly appreciated!!

 

Problem Details
Error:

*** Fatal Error: Access Violation at 00007FF88F426EC4
Module: quartus_asm.exe
Stack Trace:
0x6ec3: CGA_FAMILY_INTERFACE::get_bool_data + 0x13 (atm_cga)
0x2f01c: ASMIO_MIO_OE_INVERT::process_atom + 0x96c (comp_asmio)
0x1d028b: process_cdb + 0xaab (comp_asm)
0x1ca1f5: assemble_bcm_chip + 0x455 (comp_asm)
0x1cba07: assemble_bcm_device + 0x10a7 (comp_asm)
0x1c7b52: asm_assemble + 0x472 (comp_asm)
0x3110: QASM_FRAMEWORK::execute + 0x80 (quartus_asm)
0x11524: qexe_do_normal + 0x1d4 (comp_qexe)
0x16630: qexe_run + 0x3a0 (comp_qexe)
0x17641: qexe_standard_main + 0xc1 (comp_qexe)
0x5aed: qasm_main + 0x7d (quartus_asm)
0x13638: msg_main_thread + 0x18 (CCL_MSG)
0x1494e: msg_thread_wrapper + 0x6e (CCL_MSG)
0x18520: mem_thread_wrapper + 0x70 (ccl_mem)
0x12df1: msg_exe_main + 0xa1 (CCL_MSG)
0x8bd8: __scrt_common_main_seh + 0x11c (quartus_asm)
0x17033: BaseThreadInitThunk + 0x13 (KERNEL32)
0x52650: RtlUserThreadStart + 0x20 (ntdll)

End-trace


Executable: quartus
Comment:
None

System Information
Platform: windows64
OS name: Windows 10
OS version: 10.0

Quartus Prime Information
Address bits: 64
Version: 21.1.0
Build: 842
Edition: Standard Edition

0 Kudos
2 Replies
K_Crocker
New Contributor I
722 Views

***** PROBLEM SOLVED!! *****

Problem was traced to the project using the ALTLVDS_TX macrofunction without setting the output pins to LVDS. In the Terasic Cyclone V GX Starter Kit all LVDS-capable outputs are assigned to be "2.5 V" in the QSF file -- close but not quite there!

It would be nice if this issue was caught before crashing the assembler (say, in the Fitter).

0 Kudos
ShengN_Intel
Employee
713 Views

Glad to hear that your issue has been resolved.


I'll now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Sure, will reflect this to engineering team for further improvement.


Thanks,

Best Regards

Sheng


0 Kudos
Reply